Job Description

We are partnered with a Silicon Valley RISC-V start-up , seeking talented Power Performance (Management) Architects to join their elite team this year! Recent hires include talent from Google, Intel, and NVIDIA as they work to reduce the cost of AI models with a chip that delivers comparable power.

With a vision to reimagine accelerated computing, they have gained widespread recognition for their mission to make AI workload processing more accessible, efficient, cost-effective, and environmentally friendly. Backed by a top-tier management team, including former Silicon Valley engineers , they are scaling rapidly .

We are looking for an engineer eager to make a significant impact in one of the world’s leading emerging compiler teams. This is a hybrid position available in four locations across the US: Mountain View CA, Austin TX, Portland OR and Fort Collins CO.

Responsibilities

• Define, analyze and optimize power management for performance efficiency.
• Ensure high-quality implementation with design teams.
• Prototype and evaluate features with cross-functional teams

Requirements

• Hands-on experience in power and performance (management) architecture for GPU or CPU or SoC
• Strong understanding of power and performance modeling
• A degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field
• A strong team player with excellent collaboration and communication skills, capable of working effectively across cross-functional teams

If you want to accelerate your career in a high-performing team within a fast-growing startup, get in touch!

Interviews are being scheduled—apply now with your updated resume!

This is not a graduate position - H1B transfer available.

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